Marvell unveiled the industry’s first 112G 5nm SerDes solution that has been validated in hardware. The DSP-based SerDes boasts industry-leading performance, power and area, helping to propel 112G as the interconnect of choice for next generation 5G, enterprise, and cloud data center infrastructure.
Marvell has recently secured a new custom ASIC design win customer that will embed this new IP to build next generation top-of-rack (ToR) and spine switches for leading hyperscale data centers around the world.
The Marvell 5nm SerDes solution doubles the bandwidth of current systems based on 56G while enabling the deployment of 112G I/Os in many exciting new applications, including network and data center switching, network traffic management, machine learning training and inference, and application-specific accelerators.
The 112G 5nm SerDes solution is part of Marvell’s industry-leading IP portfolio that addresses the full spectrum of infrastructure requirements and includes processor subsystems, encryption engines, system-on-chip fabrics, chip-to-chip interconnects, and a variety of physical layer interfaces.
Marvell’s 112G 5nm SerDes offers breakthrough performance with the ability to operate at 112G PAM4 across channels with >40dB insertion loss, providing margin that is critical for high reliability infrastructure applications. The solution also delivers power reduction of more than 25% compared to 7nm, enabling systems with tight thermal/power constraints and helping to drive down total cost of ownership. The power reduction of Marvell’s high-speed SerDes enables scale up of bandwidth within acutely constrained 5G applications.
Marvell will offer a complete product suite of PHYs, switches, data processor units (DPUs), custom server processors, controllers, accelerators and custom ASICs in 5nm, delivering end-to-end interoperable infrastructure solutions. This interoperability between Marvell components will allow customers to significantly reduce their product development and validation cycle time, and time-to-market.
For Marvell’s ASIC customers, this IP further enhances the industry’s most comprehensive offering for leading-edge custom solutions. The Marvell ASIC business unit is engaged with customers across multiple markets looking to take advantage of this first-to-market proven silicon with differentiated power, performance, and area. These designs will lead the industry in bandwidth density.
“Our new 112G 5nm SerDes solution, with its industry-leading power, performance and area metrics is a true game changer and will help scale data infrastructure to meet growing interconnect requirements,” said Sandeep Bharathi, senior vice president of Central Engineering at Marvell. “System performance is typically limited by bandwidth and power in most infrastructure applications, and our new 112G solution in 5nm addresses this by doubling the bandwidth, while reducing the overall I/O power.”